Frequently Asked Questions
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Why Isn’t This Device Available in Die Form? It’s Shown in the Manufacturer’s Catalog.
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Each P/N is not from a unique chip. The device shown in the catalog might be derived from a chip which is available under another P/N. The franchised die distributor will be able to determine what chip is used for the P/N shown and advise the guaranteed electrical parameters in die form. Some devices are not available as bare die due to low demand. The distributor can help in selecting an alternate part which is available.
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Why is the Minimum Quantity So High? I Need 500 Pieces and the Minimum Order is 10,000 Pieces.
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Manufacturers will not typically sell less than one wafer of product to a distributor. If the device is not used by any other customers, the distributor will be stuck with the balance of the wafer if a minimum buy is not imposed on the end user. A high minimum should be viewed as a warning that an unpopular device has been selected which will always be difficult to procure. If this device must be purchased, the distributor will allow the order to be scheduled over a period of time to ease the impact of the minimum on the end user.
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Why is the Bare Die Version More Expensive Than the Packaged Parts? It Doesn't Even Have a Package Around It!
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The price of bare die is much more affected by the low volume and special handling of die product than the cost of the missing package. Bare dice offer substantial space savings and increased performance to circuit builders. These advantages come at a premium.
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My Source Control Drawing (SCD) Clearly Describes the Device I Want to Purchase. Why Can't Anyone Quote Parts from Stock That Meet My Requirements?
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Often, SCDs are written around the packaged device parameters in data books or the military slash sheets. Many of these parameters are not measured on bare die. Franchised die distributors can quote to the SCD, but substantial LAT or KGD testing must be quoted. The best SCD describes the true requirements for the die to work properly in the circuit. Extra parameters that are not relevant to the circuit serve to increase the cost with no increase in functionality or value.
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I Know the Manufacturer Could Build a Part That Meets These Requirements, So Why Am I Told it is Not Available?
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The issue is not what can be done based on the limits of technology, it is what will be done based on the practical considerations of testing and volume. The number of chips required for an entire program does not represent enough volume to warrant a special selection of parameters that are difficult to test. Die distributors can perform selections and matching of parts in wafer form, but the yield of product that meets a special requirement can not be controlled by the distributor. Designs that rely on standard parameters for the components are far more sustainable than designs requiring specially selected components.
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Why Does it Matter that Your Competitors Offer Custom Packaging and Build MCM's and You Don't?
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It matters a lot. Think about it. Why would we want to compete and possibly take business away from our own customers? The business environment is tough enough right now as it is – why make it harder for our customers? Besides, not having expensive production and test equipment keeps our overhead costs down. In turn, that enables us to offer LOWER prices to our customers. We are pure bare die distributor and will stay that way in the foreseeable future. It is probably apparent that die are not as easy to purchase or use as packaged semiconductors. This is why bare dice are not used in many electronic applications. Dice offer a packaging option which is the only solution when the highest circuit density, smallest size, lightest weight and highest reliability are required. Franchised die distributors provide valuable support to circuit builders working in this dynamic environment.
Industry Links & Terms
| Ag | Silver |
|---|---|
| Al | Aluminum |
| Au | Gold |
| Bare Die | Unpackaged integrated circuit die |
| Bumped Die | Unpackaged integrated circuit that has interconnect material formed in contact with the I/O to allow flip-chip attachment |
| COB (Chip On Board) | A bare die that is attached to a rigid substrate face up and electrically interconnected to the substrate using wire bond technology |
| COF (Chip On Flex) | A bare die that is attached to a flexible laminate substrate active side up and electrically interconnected to the substrate, using wire bond technology |
| CSP | Chip Scale Package |
| C4 | Controlled -Collapse Chip Connection |
| DCA | Direct Chip Attachment |
| DPC | Die Product Consortia |
| EMI | Electromagnetic Interference |
| ESD | Electrostatic Discharge |
| Eutectic Solder | 63% Tin, 37% Lead |
| FCP | Few Chip Package |
| Film Frame | Sawn wafer on sticky tape supported by a metal frame |
| Flip Chip | A method for electrically interconnecting unpackaged die active side down with a conductive bump to the substrate |
| Gel-Pak® | Plastic trays used to ship unpackaged die. The die is held in place by surface tension of membrane. A vacuum chuck is,required to reduce surface tension and remove die |
| HDI | High Density Interconnect |
| I/O | Input/Output |
| IC | Integrated Circuit |
| JEDEC | Joint Electronic Device Engineering Council |
| LTCC | Low-Temperature Co-Fired Ceramic |
| MCM | Multi-Chip Module |
| MCP | Multi-Chip Package |
| MIL-STD-883 | Military standard defining test methods and process procedures for microelectronic devices |
| Mv | Microvia technology creates a PC board via of <=150um (typically by non-mechanical means) and uses built-up multi-layer processes |
| uBGA | Micro Ball Grid Array Package |
| uSMD | Micro Surface Mount Device |
| Pb | Lead |
| PWB | Printed Wiring Board |
| RF | Radio Frequency |
| S Level | Wafer fabrication processing and quality requirements per MIL-PRF-38535 |
| SCD | Source Control Drawing |
| SEM | Scanning Electron Micrograph |
| SiP | System in Package |
| SOC | System on a Chip |
| SMD | Surface Mount Device |
| Sn | Tin |
| SPC | Statistical Process Control |
| TAB | Tap Automated Bonding |
| Tape on Reel | A high volume automated shipping method for automated assembly processing available on 7″ or 13″ reels |
| Tg | Glass Transition Temperature |
| UBM | Under Bump Metallurgy |
| UV | Ultraviolet |
| Waffle Packs | Plastic trays with individualized pockets designed for a specific die size |
| Wirebond | A method for electrically connecting the die bond pad to the substrate trace typically using Au or Al bond wires |
| WL-CSP | Wafer-Level Chip Scale Package |
| WLP | Wafer-Level Packaging |